T or Pi topologies are used in conventional Voltage Variable Attenuators (VVAs). Linearity is determined by each arm of the VVA. Designers often use multi-gate MESFETs or pHEMTs in each arm to improve the power handling and linearity performance. Very frequently, however, this technique is limited by the particular process technology implemented. Certain process technologies only offer a limited number of gates per transistor, thus compromising the ultimate performance of conventional VVAs.
It would be desirable to implement a voltage variable attenuator (VVA) having high linearity using known process technologies.